Algorithms for Efficient 3 - D Interconnectmodeling and Coupled Circuit
نویسندگان
چکیده
| The ever increasing speeds and shrinking feature sizes that are typical of state of the art integrated circuits designs have made coupling due to interconnect and packaging a very important, sometimes dominant, factor in system performance. The ability to eeciently perform coupled circuit-interconnect simulation before fabrication is essential in order to detect signal degradation due to delays or crosstalk. In this paper we review some algorithms currently used for generating low order models for eecient coupled circuit-interconnect simulation. We rst discuss methods of generating models for three dimensional interconnect and packaging structures and then present state-of-the-art model order reduction techniques to reduce the order of the interconnect models.
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